Image sensor power supply rejection ratio improvement through ramp generator in continuous time readout circuitry
US9571775B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2015 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Nov 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A ramp generator for use in readout circuitry includes an integrator coupled to receive a ramp generator input reference signal to generate a reference ramp signal coupled to be received by an analog to digital converter. A power supply compensation circuit that is coupled to generate the ramp generator input reference signal includes a delay circuit including a variable resistor and a filter capacitor coupled to receive a power supply signal. The variable resistor is tuned to match a delay ripple from the power supply to a bitline output. A capacitive voltage divider is coupled to the delay circuit to generate the ramp generator input reference signal. The capacitive voltage divider includes a first variable capacitor coupled to a second variable capacitor that are tuned to provide a capacitance ratio that matches a coupling ratio from the power supply to the bitline output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.