Data storage and access in block processing pipelines
US9571846B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2013 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Feb 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/53
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Block processing pipeline methods and apparatus in which reference data are stored to a memory according to tile formats to reduce memory accesses when fetching the data from the memory. When the pipeline stores reference data from a current frame being processed to memory as a reference frame, the reference samples are stored in macroblock sequential order. Each macroblock sample set is stored as a tile. Reference data may be stored in tile formats for luma and chroma. Chroma reference data may be stored in tile formats for chroma 4:2:0, 4:2:2, and/or 4:4:4 formats. A stage of the pipeline may write luma and chroma reference data for macroblocks to memory according to one or more of the macroblock tile formats in a modified knight's order. The stage may delay writing the reference data from the macroblocks until the macroblocks have been fully processed by the pipeline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.