Monitoring accesses of a thread to multiple memory controllers and selecting a thread processor for the thread based on the monitoring
US9575806B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2012 |
| Grant date | Feb 21, 2017 |
| Priority date | — |
| Expiry date | Apr 30, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of an aspect includes running a plurality of threads on a plurality of thread processors. Memory accesses, of a thread of the plurality that is running on a first thread processor of the plurality, are monitored to both a first memory through a first memory controller and a second memory through a second memory controller. A second thread processor of the plurality is selected for a thread based on the monitoring of the memory accesses of the thread to both the first memory and the second memory. Installation of the thread, for which the second thread processor was selected, is initiated on the second thread processor. Other methods, apparatus, and systems are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.