Buffer circuit having amplifier offset compensation and source driving circuit including the same
US9577619B2 · kind B2 · utility
2Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2014 |
| Grant date | Feb 21, 2017 |
| Priority date | — |
| Expiry date | Mar 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45212
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided are an output buffer circuit having an amplifier offset compensation function and a source driving circuit including the output buffer circuit. The output buffer circuit may include a plurality of channel amplifiers, each of which is configured to adjust an amount of current flowing through transistors connected to at least one of a non-inverted input terminal and an inverted input terminal of a differential input unit to compensate an amplifier offset, and adjust buffer input voltage signals to generate output voltage signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.