Method of preventing inversion of output current flow in a voltage regulator and related voltage regulator
US9582017B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 1, 2014 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Mar 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H7/1213
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The reversal of the flow of output current in a voltage regulator is prevented by equipping the voltage regulator of a regulation transistor controlled by an analog voltage control, having its current terminals connected between the control terminal of the fifth transistor power of the regulator and the power supply line or the common ground node of the regulator. The regulation transistor is configured to provide an electrical path of conduction between the control terminal and the power supply line or the ground node and is controlled by an analog voltage control that varies in a continuous manner between a first level, suitable to extinguish the regulation transistor, and a second level suitable for biasing it in an operating condition of deep conduction, as the difference between the supply voltage and the regulated output voltage approaching an offset voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.