Memory apparatus and methods thereof for preventing read errors on weak pages in a non-volatile memory system
US9582417B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2014 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Jun 26, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory apparatus and methods are provided for preventing read errors on weak pages in a non-volatile memory system. In one example, a method includes identifying a weak page in a non-volatile memory device along a word line, wherein the weak page is partially written with at least some data; buffering data associated with the weak page to a weak page buffer that is coupled in communication with the non-volatile memory device; determining that an amount of data in the weak page buffer has reached a predetermined data level; and writing the data from the weak page buffer into the weak page along the word line in the non-volatile memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.