Security of program executables and microprocessors based on compiler-architecture interaction
US9582650B2 · kind B2 · utility
1Cited by
230References
11Claims
0Family size
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Key dates
| Filing date | Nov 21, 2012 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Dec 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, for use in a processor context, wherein instructions in a program executable are encoded with plural instruction set encodings. A method wherein a control instruction encoded with an instruction set encoding contains information about decoding of an instruction that is encoded with another instruction set encoding scheme. A method wherein instruction set encodings are randomly generated at compile time. A processor framework wherein an instruction is decoded during execution with the help of information provided by a previously decoded control instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.