Patent · US Active

Selected gate driver circuit in memory circuits, and control device and control method thereof

US9583156B2 · kind B2 · utility

0Cited by

5References

14Claims

0Family size

Assignee

Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

Guangyan Luo · Shanghai, CN
Hao Ni · Shanghai, CN
Changwei Yin · Shanghai, CN
Xiao Zheng · Shanghai, CN

Key dates

Filing date	Jul 1, 2016
Grant date	Feb 28, 2017
Priority date	—
Expiry date	Jul 1, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/26
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A selected gate (SG) driver circuit, including a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a first PMOS transistor, and a second PMOS transistor. A gate electrode of the first NMOS transistor is connected to a gate electrode of the first PMOS transistor, a source electrode of the first NMOS transistor being connected to a drain electrode of the third NMOS transistor, and a drain electrode of the first NMOS transistor being connected to a drain electrode of the first PMOS transistor and a gate electrode of the second NMOS transistor. A source electrode of the second NMOS transistor is connected to a source electrode of the third NMOS transistor, and a drain electrode of the second NMOS transistor being connected to a drain electrode of the second PMOS transistor and a gate electrode of the third NMOS transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.