Patent · US Active

Semiconductor memory device including rewriting operation for improving the long-term reliability of the resistance variable element

US9583188B2 · kind B2 · utility

2Cited by
5References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 18, 2015
Grant dateFeb 28, 2017
Priority date
Expiry dateNov 18, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2213/82
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor memory device has at least one memory cell using a resistance variable element, and a control circuit which controls writing to and reading from the memory cell. Operations by the control circuit include a first writing operation, a second writing operation, and a rewriting operation. The first writing operation is a writing operation for applying a first voltage of a first polarity to the memory cell. The second writing operation is a writing operation for applying a second voltage of a second polarity opposite to the first polarity to the memory cell. The rewriting operation is a writing operation for, when the first writing operation fails, further executing a second A writing operation for applying the second voltage of the second polarity to the memory cell and a first A writing operation for applying the first voltage of the first polarity to the memory cell.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.