Semiconductor devices including metal-silicon-nitride patterns
US9583440B2 · kind B2 · utility
1Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2015 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Jul 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device can include a first conductive line crossing over a field isolation region and crossing over an active region of the device, where the first conductive line can include a first conductive pattern being doped, a second conductive pattern, and a metal-silicon-nitride pattern between the first and second conductive patterns and can be configured to provide a contact at a lower boundary of the metal-silicon-nitride pattern with the first conductive pattern and configured to provide a diffusion barrier at an upper boundary of the metal-silicon-nitride pattern with the second conductive pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.