Tipless transistors, short-tip transistors, and methods and circuits therefor
US9583484B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 10, 2016 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Jun 10, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit can include a plurality of first transistors formed in a substrate and having gate lengths of less than one micron and at least one tipless transistor formed in the substrate and having a source-drain path coupled between a circuit node and a first power supply voltage. In addition or alternatively, an integrated circuit can include minimum feature size transistors; a signal driving circuit comprising a first transistor of a first conductivity type having a source-drain path coupled between a first power supply node and an output node, and a second transistor of a second conductivity type having a source-drain path coupled between a second power supply node and the output node, and a gate coupled to a gate of the first transistor, wherein the first or second transistor is a tipless transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.