Array substrate, preparation method for array substrate, and display device
US9583508B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 29, 2014 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Sep 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/421
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses an array substrate, a preparation method for the array substrate, and a display device, wherein the array substrate comprises a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode, and a pixel electrode arranged on a substrate, the active layer includes an electric conduction area, a coverage area covered by the source electrode and the drain electrode, and an exposure area surrounding the coverage area, and the pixel electrode is lapped on the upper surfaces of the drain electrode, the exposure area of the active layer, and the gate insulation layer. According to the present invention, the pixel electrode breaks in the area, with the large gradient angle, of the drain electrode caused by slip-down due to gravity can be avoided, and the lap joint for the pixel electrode and the drain electrode is effectively facilitated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.