Patent · US Active

Clock generator with stability during PVT variations and on-chip oscillator having the same

US9584132B2 · kind B2 · utility

5Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 7, 2015
Grant dateFeb 28, 2017
Priority date
Expiry dateDec 7, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/06
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Provided is a clock generator that includes a comparator in which characteristics of two input signals vary over time. A voltage controller, having a resistor and at least one constant current source, generates a direct current (DC) voltage proportional to an output current of the constant current source and a resistance value of the resistor. The comparator compares a ramp voltage generated by the voltage controller with the DC voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.