Relay attack countermeasure system
US9584542B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2015 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Feb 4, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W12/61
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An apparatus for preventing a relay attack that includes a microcontroller, a receiver, and a transmitter. The receiver is configured to receive a challenge message from a verifier. The challenge message has a challenge message frequency at a first challenge message frequency during a first time slot. The transmitter is configured to transmit a response message to the verifier. The response message has a response message frequency at a first response message frequency during the first time slot. The first response message frequency is different than the first challenge message frequency. The challenge message frequency is at a second challenge message frequency and the response message frequency is at a second response message frequency during a second time slit. The second challenge message frequency is different than the second response message frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.