Array substrate and method for manufacturing the same, and display device
US9588389B2 · kind B2 · utility
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2References
17Claims
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Key dates
| Filing date | Dec 13, 2013 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Oct 12, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The array substrate according to the present disclosure may include a base substrate, gate lines and data lines arranged in a crisscross manner on the base substrate, and a common electrode; wherein the common electrode includes a transparent conductive layer and a first auxiliary conductive layer under the transparent conductive layer; the first auxiliary conductive layer of the common electrode at least partially overlaps the gate lines or the data lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.