Systems and methods for viewing analog simulation check violations in an electronic design automation framework
US9589085B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2014 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Feb 20, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, method, and computer program product for viewing analog simulation check violations in an EDA framework. Embodiments combine input data tables into a single data table for each check type using SQL inner join operations, create a SQL view of the single data table to list individual check violations, and output the view for user inspection of the corresponding check violations. Embodiments normalize the input data tables to include details of circuit nodes, elements, and paths implicated in the check violations. Additional views combine views of different check types into unified summary tables. Embodiments create a second view to aggregate individual check violations that involve the same circuit objects over time, and output the second view. Output views are self-describing, to enable a single graphical user interface to operate across multiple simulator versions. Metadata tables describe data types presented in various view columns, and user interactions allowed therewith.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.