Energy efficient three-terminal voltage controlled memory cell
US9589616B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2015 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Oct 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory cell, method for operating the memory cell and method for fabricating the memory cell are disclosed. The memory cell includes at least three terminals, a first magnetic tunnel junction (MTJ) structure and a second MTJ structure. The first MTJ is coupled between a first terminal (FT) and a third terminal. A portion of the first MTJ is configured to include a first barrier layer disposed between a first fixed layer and a free layer (FL). A magnetization direction of the FL is used to store data, the magnetization direction being controlled by an electric field. The second MTJ is coupled between the FT and a second terminal, where a portion of the second MTJ is configured to include a second barrier layer disposed between a second fixed layer and the FL, where a tunnel magnetoresistance of the second barrier layer is used to read the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.