Semiconductor device
US9589948B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 27, 2013 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Sep 15, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73265
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has first and second NMOS transistors and an internal circuit, all formed in the same semiconductor substrate. The first NMOS transistor has a gate connected to a power supply terminal configured for connection to a power supply, a source and a back gate connected to an internal ground node, and a drain connected to a ground terminal configured for connection to the power supply. The second NMOS transistor has a gate connected to the ground terminal, a source and a back gate connected to the internal ground node, and a drain connected to the power supply terminal. The internal circuit is configured to operate with a voltage between the power supply terminal and the internal ground node. During a normal connection state in which the power supply is normally connected to the semiconductor device, current flows through the internal circuit and the second NMOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.