Method for producing one-time-programmable memory cells and corresponding integrated circuit
US9589968B2 · kind B2 · utility
0Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2015 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Nov 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a silicon on insulator substrate having a semiconductor film located above a buried insulating layer. At least one memory cell of the one-time-programmable type includes an MOS capacitor having a first electrode region including a gate region at least partially silicided and flanked by an insulating lateral region, a dielectric layer located between the gate region and the semiconductor film, and a second electrode region including a silicided zone of the semiconductor film, located alongside the insulating lateral region and extending at least partially under the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.