ITC-IGBT and manufacturing method therefor
US9590083B2 · kind B2 · utility
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15Claims
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Key dates
| Filing date | Dec 6, 2012 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Dec 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02532
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An ITC-IGBT and a manufacturing method therefor. The method comprises: providing a heavily doped substrate, forming a GexSi1-x/Si multi-quantum well strained super lattice layer on the surface of the heavily doped substrate, and forming a lightly doped layer on the surface of the GexSi1-x/Si multi-quantum well strained super lattice layer. The GexSi1-x/Si multi-quantum well strained super lattice layer is formed on the surface of the heavily doped substrate through one step, simplifying the production process of the ITC-IGBT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.