Method of manufacturing 3D barrier substrate
US9590231B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 17, 2013 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Jul 3, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/10
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of the present invention discloses a 3D barrier substrate and a method for manufacturing the same, and a display device in order to improve the utilization of facilities, increase the production efficiency, and decrease the cost of production. The method of manufacturing 3D barrier substrate comprises: forming a transparent electrode thin film on a substrate, and forming a passivation layer on the transparent electrode thin film; forming an transparent electrode and a passivation layer via hole by a patterning process, wherein the via hole is used for coupling the transparent electrode to the signal line; and forming a signal line, wherein the signal line is coupled to the transparent electrode through the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.