Glitch filter circuit and method
US9590605B2 · kind B2 · utility
2Cited by
3References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 28, 2012 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Nov 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00369
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A glitch filter circuit has a filter/delay part that always operates on rising or falling pulses for both rising edges and falling edges of the input signal. In this way, the filter delay can be made symmetrical and the circuit will have no duty cycle distortion. The rise and fall delays will track each other when there are PVT (Process, Voltage and Temperature) variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.