Superconducting cell array logic circuit system
US9595970B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2016 |
| Grant date | Mar 14, 2017 |
| Priority date | — |
| Expiry date | Mar 24, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
One embodiment describes a superconducting cell array logic circuit system. The system includes a plurality of superconducting cells arranged in an array of at least one row and at least one column. The superconducting cell array logic circuit system can be configured to implement a logic operation on at least one logic input signal received at at least one respective input associated with the respective at least one row to provide at least one logic output signal on at least one respective output associated with the at least one column based on a predetermined selective coupling of the at least one input to the at least one output via the plurality of superconducting cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.