Methods for built-in self-measurement of jitter for link components
US9596160B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2014 |
| Grant date | Mar 14, 2017 |
| Priority date | — |
| Expiry date | Dec 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/205
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention relates to a method for built-in self-measurement (BISM) of jitter components. A built-in self-measurement controller on the host integrated circuit (and, in some cases, a slave controller on a partner integrated circuit) may be used to control various switches to form various loopback circuits. A calibrated jittery data pattern is transmitted through each of the various loopback circuits. On-die instrumentation (ODI) circuitry may then be used to measure intrinsic jitter components for each loopback circuit via data representations such as eye-diagrams, or jitter histograms, or bit error ratio bathtub curves. The intrinsic jitter for link components (i.e. the jitter components such as deterministic jitter (DJ), random jitter (RJ), total jitter (TJ)) may then be determined based on the measured intrinsic jitters for the various loopback circuits. Other embodiments and features are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.