Resistive change memory including current limitation circuit
US9601196B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 15, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Sep 15, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes: first and second wiring lines; resistive change memories disposed intersection regions of the first and second wiring lines; and a control circuit controlling the first and second drivers to select one of the first wiring lines and one of the second wiring lines, the control circuit changing a resistance of the selected one of the resistive change memories from the first resistive state to the third resistive state, and then changing the resistive state of the selected one of the resistive change memories from the third resistive state to the second resistive state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.