Wafer transport method
US9601360B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Mar 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/673
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer transport method is provided. The wafer transport method includes loading an initial carrier containing a first wafer and a second wafer on a first semiconductor apparatus, and processing the first wafer by the first semiconductor apparatus, and loading the first wafer into a first carrier disposed on the first semiconductor apparatus. The wafer transport method also includes processing the second wafer by the first semiconductor apparatus, and loading the second wafer into a second carrier disposed on the first semiconductor apparatus. The wafer transport method further includes processing the first wafer by a second semiconductor apparatus, and loading the first wafer into an integration carrier disposed on the second semiconductor apparatus. The wafer transport method further includes processing the second wafer by the second semiconductor apparatus, and loading the second wafer into the integration carrier disposed on the second semiconductor apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.