Dual active layer semiconductor device and method of manufacturing the same
US9601530B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 9, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Mar 9, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments include a semiconductor device. The semiconductor device includes a transistor having a gate metal layer, a transistor composite active layer, and one or more contact elements over the transistor composite active layer. The transistor composite active layer includes a first active layer and a second active layer, the first active layer is over the gate metal layer, and the second active layer is over the first active layer. Meanwhile, the semiconductor device also includes one or more semiconductor elements forming a diode over the transistor. The semiconductor element(s) have an N-type layer over the transistor, an I layer over the N-type layer, and a P-type layer over the I layer. Other embodiments of related systems and methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.