Semiconductor device

US9601580B2 · kind B2 · utility

Assignee

• Kabushiki Kaisha Toshiba · JP

Inventors

• Ryosuke Iijima · Setagaya, JP
• Kazuto Takao · Tsukuba, JP
• Tatsuo Shimizu · Shinagawa, JP

Key dates

• Filing date: Feb 10, 2015
• Grant date: Mar 21, 2017
• Expiry date: Mar 25, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/126

Abstract

A semiconductor device includes a first transistor having a first conductivity type SiC layer, a second conductivity type SiC well region, a first conductivity type SiC first source region, a first conductivity type SiC first drain region, and a first gate electrode provided on the well region sandwiched between the first source region and the first drain region. The device includes a second transistor having a second conductivity type SiC second source region, a second conductivity type SiC second drain region provided on the SiC layer, and a second gate electrode provided on the SiC layer sandwiched between the second source region and the second drain region. There is an angle between a direction of a channel forming portion of first transistor and that of the second transistor. The device includes an element isolation region having a bottom positioned in the SiC layer.