Output buffer with offset cancellation structure and offset cancellation method using the same
US9602104B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Sep 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45212
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output buffer with an offset cancellation structure for an LCD source driver includes an operational amplifier, for driving an output signal of the output buffer according to a data signal from a data input terminal of the output buffer; a reference voltage generator, for generating a reference voltage and inputting the reference voltage to the operational amplifier; and a sampling capacitor, coupled between a second input terminal of the operational amplifier and the data input terminal of the output buffer in a first phase, and coupled between the second input terminal of the operational amplifier and an output terminal of the operational amplifier in a second phase, wherein the second input terminal of the operational amplifier is further coupled to the output terminal of the operational amplifier in the first phase. The output signal outputs the data signal where the offset voltage is cancelled in the second phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.