Phase-locked loop with multiple degrees of freedom and its design and fabrication method
US9602114B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Sep 14, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A design method for a phase-locked loop comprises: a controlled-frequency oscillator; a phase comparator, to determine a phase difference between an output signal of the controlled-frequency oscillator and a reference signal; a corrector to receive as input a signal representative of the phase difference and to generate at its output a first correction signal; at least one second corrector, to receive as input a signal representative of or affected by a phase noise of the reference signal or of the output signal of the controlled-frequency oscillator and to generate at its output a second correction signal; and a circuit for generating a slaving signal for the controlled-frequency oscillator on the basis of the first and second correction signals; the method using the H-infinity method. Method for fabricating such a loop comprising a design step implementing this method. Phase-locked loop thus obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.