Patent · US Active

Wideband InP digital-to-analog converter integrated with a SiGe clock distribution network

US9602125B1 · kind B1 · utility

0Cited by
16References
20Claims
0Family size

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Key dates

Filing dateOct 1, 2014
Grant dateMar 21, 2017
Priority date
Expiry dateDec 3, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/742
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A digital-to-analog converter (DAC) including a DAC core circuit having a plurality of input lines each being responsive to a digital bit input signal and an output line outputting a converted analog signal of the digital bits. The DAC also includes a clock circuit responsive to a clock input signal at one frequency and outputting a clock output signal at another frequency. The DAC also includes a clock tree distribution network responsive to the clock output signal from the clock circuit and splitting the clock output signal into a plurality of split clock signals that are applied to the DAC core circuit, where the DAC core circuit is fabricated in an indium phosphide (InP) semiconductor material and the clock tree distribution network is fabricated in a silicon germanium (SiGe) semiconductor material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.