Patent · US Active

Enabling error detecting and reporting in machine check architecture

US9606847B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 18, 2014
Grant dateMar 28, 2017
Priority date
Expiry dateApr 17, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/0751
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In accordance with embodiments disclosed herein, there is provided systems and methods for detecting and reporting errors in a machine check environment. A processing device includes an error monitoring module, which detects an error corresponding to data associated with execution of an instruction by the processing device and determines whether the error occurs on portion of the data that affects a result of the instruction. The processing device further enables error detection when it is determined that the error occurs on the portion of the data that affects the result of the execution of the instruction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.