Non-volatile memory device having adjustable read voltage, memory system comprising same, and method of operating same
US9606864B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2013 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Jul 19, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3431
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes a memory cell array including a selected page including multiple error correction code (ECC) units, and a voltage generation unit configured to generate a read voltage to read data from the selected page. Read voltage levels are set individually for the respective ECC units according to data detection results for each of the ECC units. During a read retry section performed with respect to selected ECC units of the selected page for which read errors have been detected, a re-read operation of the selected ECC units is performed according to the respective read voltage levels set for the selected ECC units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.