Hierarchical multi-core debugger interface
US9606888B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2014 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Aug 31, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3698
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hierarchical multi-core debugger interface is described that is configured to enable debugging of a multi-core device. In some implementations, a multi-core debugger renders core-specific user interface components with a core-specific visual characteristic in the hierarchical multi-core debugger interface. In other implementations, the multi-core debugger renders core-specific user interface components in core-specific windows in the hierarchical multi-core debugger interface. In still other implementations, the multi-core debugger renders core-specific user interface components in core-specific windows in the hierarchical multi-core debugger interface, where each core-specific window is displayed with a core-specific visual characteristic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.