Instruction and logic for a binary translation mechanism for control-flow security
US9606941B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2016 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Apr 27, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/034
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a front end, an execution pipeline, and a binary translator. The front end includes logic to receive an instruction and to dispatch the instruction to a binary translator. The binary translator includes logic to determine whether the instruction includes a control-flow instruction, identify a source address of the instruction, identify a target address of the instruction, determine whether the target address is a known destination based upon the source address, and determine whether to route the instruction to the execution pipeline based upon the determination whether the target address is a known destination based upon the source address. The target address includes an address to which execution would indirectly branch upon execution of the instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.