Voltage mode sensing for low power flash memory
US9607708B2 · kind B2 · utility
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28Claims
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Key dates
| Filing date | Oct 31, 2012 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Jan 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/50004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Electrically erasable flash memory and method. The memory has a data storage element and a voltage sensing circuit. The data storage element is configured to store data bits, each of the data bits having a data state. The voltage sensing circuit is selectively coupled to individual ones of data bits and is configured to bias the data bits with at least one of a bias current and a bias resistance and to read the data state of the individual ones of the plurality of data bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.