Cooled printed circuit with multi-layer structure and low dielectric losses
US9609740B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2014 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Jun 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/1056
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The printed circuit with a multi-layer structure comprises: a first layer machined to form a spotface passing through the layer, a second layer comprising a first cavity passing through the layer, a third layer comprising, on one face, an electronic component that is in the first cavity, a fourth layer comprising a second cavity, a heat-conducting element with two parts: one made of metal, called a thermal cover, inserted into the spotface of the first layer so as to close, mechanically and electrically, the first cavity, the other made of a dielectric material with heat conduction >30 W/(m·K), placed in the first cavity so as to be in contact with the electronic component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.