Packaged circuit with a lead frame and laminate substrate
US9613889B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2015 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Mar 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the subject application provide for a circuit comprising: a lead frame having a first plurality of exposed terminals, the lead frame defining a plane; a laminate substrate in the plane defined by the lead frame, adjacent to the lead frame, and electrically coupled to the lead frame, the laminate substrate having a first surface including a second plurality of exposed terminals and a second surface opposite the first surface; a first one or more dies mounted on the lead frame and electrically coupled to the lead frame; and a second one or more dies mounted on the second surface of the laminate substrate and electrically coupled to the laminate substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.