Low voltage triggered silicon controlled rectifier with high holding voltage and small silicon area

US9613946B2 · kind B2 · utility

Assignee

• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

• Lei Zhong · Lo Wu, CN
• Hongwei Li · Burnaby, CA
• Wei Lei · Campbell, US
• Guang Chen · Tangxia, CN
• Huijuan Cheng · Shanghai, CN

Key dates

• Filing date: Jun 10, 2016
• Grant date: Apr 4, 2017
• Expiry date: Jun 10, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/177

Abstract

A semiconductor device includes a P-type semiconductor substrate, a first N-well, a second N-well, and a P-well adjoining the first and second N-wells, a first doped region having a first conductivity type within the first N-well, a second doped region having a second conductivity type bridging the first N-well and the P-well, a third N+ doped region bridging the second N-well and the P-well, a fourth P+ doped region within the second N-well and spaced apart from the third N+ doped region, and a gate structure formed on the surface of the P-well and between the second doped region and the third N+ doped region. The gate structure, the second doped region, and the third N+ doped region form an NMOS structure. The semiconductor device is a low voltage triggered SCR having a relatively small silicon area and high holding voltage.