Fin field effect transistors and fabrication method thereof
US9613960B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2015 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Dec 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming FinFETs includes providing a semiconductor substrate having at least a first fin in a first region and at least a second fin in a second region, and a first gate structure over the first fin and a second gate structure over the second fin; forming a first stress layer on the first fin and a first cover layer on the first stress layer; forming a second stress layer on the second fin and a second cover layer on the second stress layer; performing a first potential barrier reducing ion implantation process on the first cover layer; performing a second potential barrier reducing ion implantation process on the second cover layer; forming a first metal layer and a second metal layer; and forming a first contact layer on the first cover layer and a second contact layer on the second cover layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.