Electronic circuit, electronic apparatus, and method for eliminating metastability
US9614500B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2015 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Jun 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0375
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic circuit includes a clock control unit having a first input for receiving a first clock signal, a second input for receiving a second clock signal, a first clock output, and a second clock output, a first flip-flop having a first data input, a first clock input connected to the first clock output, and a first output, and a second flip-flop having a second data input, a second clock input connected to the second clock output, and a second data input connected to the first output of the first flip-flop. The clock control unit provides the first clock signal to the first clock input of the first flip-flop through the first clock output and the second clock signal to the clock input of the second flip-flop through the second clock output terminal in a sequential order.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.