Patent · US Active

Write mechanism for storage class memory

US9619174B2 · kind B2 · utility

7Cited by
2References
27Claims
0Family size

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Key dates

Filing dateDec 30, 2011
Grant dateApr 11, 2017
Priority date
Expiry dateJul 27, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7205
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Storage class memory may be used in an architecture to achieve high performance, high reliability, high compatibility. In some embodiments, reads may be handled in a conventional way used in a memory based model. However writes do not use a memory based model but instead correspond to a storage based model. The hybrid nature can be achieved by setting the storage class memory to be write protected so that all writes must go through a software based block device interface. In some embodiments, the software based block device interface prevents erroneous writes to the storage class memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.