System and method for performing floating point operations in a processor that includes fixed point operations
US9619205B1 · kind B1 · utility
2Cited by
2References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2014 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Apr 11, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer implemented method for performing floating point operations as part of a processor architecture that also includes fixed point operations is disclosed. The computer implemented method includes providing a group of instructions within the fixed point architecture. A floating point value is split between two programmer visible registers. In a system and method in accordance with the present invention a new form of floating point representation and associated processor operations, including efficient complex number representations and operations are utilized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.