Patent · US Active

Invalidating stored address translations

US9619387B2 · kind B2 · utility

1Cited by
9References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 21, 2014
Grant dateApr 11, 2017
Priority date
Expiry dateJan 4, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/683
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A data processing apparatus and a method of processing data are disclosed, in which address translations between first addresses used in a first addressing system and second addresses used in a second addressing system are locally stored. Each stored address translation is stored with a corresponding identifier. In response to an invalidation command to perform an invalidation process on a selected stored address translation the selected stored address translation is invalidated, wherein the selected stored address translation is identified in the invalidation command by a specified first address and a specified identifier. The invalidation process is further configured by identifier grouping information which associates more than one identifier together as a group of identifiers, and the invalidation process is applied to all stored address translations which match the specified first address and which match any identifier in the group of identifiers to which the specified identifier belongs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.