Memory-mapped state bus for integrated circuit
US9619423B1 · kind B1 · utility
4Cited by
3References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 29, 2013 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Sep 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7817
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and devices are provided for broadcasting a message to addressed logic blocks in lieu of, or in addition to, programming individual status registers of an integrated circuit. One such device may be an integrated circuit that includes a broadcast bus and addressed logic blocks. The broadcast bus may broadcast an addressed message that includes content and a target address. Each of the addressed logic blocks may receive the addressed message from the broadcast bus and use the content of the addressed message only when the target address matches an address assigned to that logic block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.