Patent · US Active

Technologies for low-power standby display refresh

US9620088B2 · kind B2 · utility

2Cited by
0References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 11, 2015
Grant dateApr 11, 2017
Priority date
Expiry dateJun 2, 2035

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D30/50
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Technologies for low-power display refresh standby include a computing device with a display such as an LCD panel. The computing device may include a system-on-a-chip (SoC) with a processor, I/O subsystem, display controller, and memory. When the computing device determines that a display image is static, the computing device enters a low-power display refresh standby mode, powering down unneeded components of the SoC such as processor cores, peripheral devices, and memory other than a dedicated display buffer. The display controller may access the dedicated display buffer via the I/O subsystem and output the image to the display. The computing device may power down the I/O subsystem and the dedicated display buffer when a display controller FIFO is full of image data, and periodically power on the I/O subsystem and display buffer to fill the display controller FIFO. Other embodiments are described and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.