Semiconductor resistive memory devices including separately controllable source lines
US9620190B2 · kind B2 · utility
4Cited by
8References
18Claims
0Family size
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Key dates
| Filing date | Jan 30, 2015 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Jan 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetic memory device can include a plurality of separately controllable magnetic memory segments configured to store data. A plurality of separately controllable source lines can each be coupled to a respective one of the plurality of separately controllable magnetic memory segments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.