Nonvolatile memory integrated circuit with built-in redundancy
US9620203B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2015 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Sep 9, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor integrated circuit includes a memory cell including first and second electrodes and a resistance change film therebetween, and a control circuit controlling a potential difference between the first and second electrodes. The control circuit reversibly changes the memory cell to a first resistive state by applying a first potential to the first electrode and by applying a second potential smaller than the first potential to the second electrode. The control circuit reversibly changes the memory cell to a second resistive state by applying a third potential to the first electrode and by applying a fourth potential smaller than the third potential to the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.