Shift register
US9620240B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2014 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Jul 10, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a shift register including stages for sequentially outputting output pulses including carry and scan pulses. Odd-numbered stages supply corresponding scan pulses to odd-numbered gate lines in a sequential manner, and even-numbered stages supply corresponding scan pulses to even-numbered gate lines in a sequential manner. Each stage includes a carry output unit for generating a carry pulse, based on a first discharge voltage and a clock pulse having a low-level voltage equal to the first discharge voltage, and supplying the carry pulse to at least one of upstream and downstream stages, and a scan output unit for generating a scan pulse, based on a second discharge voltage having a higher voltage than the first discharge voltage and the clock pulse, and supplying the scan pulse to a corresponding gate line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.