Patent · US Active

Kind of power tri-gate LDMOS

US9620638B1 · kind B1 · utility

3Cited by
0References
7Claims
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Key dates

Filing dateAug 31, 2016
Grant dateApr 11, 2017
Priority date
Expiry dateAug 31, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/62

Abstract

A tri-gate laterally-diffused metal oxide semiconductor (LDMOS), including a substrate, a P-type semiconductor region, a P-type contact region, an N-type source region, a gate dielectric layer, an N-type drift region, a first isolation dielectric layer, an N-type drain region, and a second isolation dielectric layer. The P-type semiconductor region is disposed on one end of an upper surface of the substrate, and the N-type drift region is disposed on another end of the upper surface. The P-type semiconductor region contacts with the N-type drift region. The P-type contact region and the N-type source region are disposed on one side of the P-type semiconductor region which is away from the N-type drift region, and compared with the P-type contact region, the N-type source region is in the vicinity of the N-type drift region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.